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1 /*! `verilog` grammar compiled for Highlight.js 11.11.1 */
2 var hljsGrammar = (function () {
3 'use strict';
4
5 /*
6 Language: Verilog
7 Author: Jon Evans <jon@craftyjon.com>
8 Contributors: Boone Severson <boone.severson@gmail.com>
9 Description: Verilog is a hardware description language used in electronic design automation to describe digital and mixed-signal systems. This highlighter supports Verilog and SystemVerilog through IEEE 1800-2012.
10 Website: http://www.verilog.com
11 Category: hardware
12 */
13
14 function verilog(hljs) {
15 const regex = hljs.regex;
16 const KEYWORDS = {
17 $pattern: /\$?[\w]+(\$[\w]+)*/,
18 keyword: [
19 "accept_on",
20 "alias",
21 "always",
22 "always_comb",
23 "always_ff",
24 "always_latch",
25 "and",
26 "assert",
27 "assign",
28 "assume",
29 "automatic",
30 "before",
31 "begin",
32 "bind",
33 "bins",
34 "binsof",
35 "bit",
36 "break",
37 "buf|0",
38 "bufif0",
39 "bufif1",
40 "byte",
41 "case",
42 "casex",
43 "casez",
44 "cell",
45 "chandle",
46 "checker",
47 "class",
48 "clocking",
49 "cmos",
50 "config",
51 "const",
52 "constraint",
53 "context",
54 "continue",
55 "cover",
56 "covergroup",
57 "coverpoint",
58 "cross",
59 "deassign",
60 "default",
61 "defparam",
62 "design",
63 "disable",
64 "dist",
65 "do",
66 "edge",
67 "else",
68 "end",
69 "endcase",
70 "endchecker",
71 "endclass",
72 "endclocking",
73 "endconfig",
74 "endfunction",
75 "endgenerate",
76 "endgroup",
77 "endinterface",
78 "endmodule",
79 "endpackage",
80 "endprimitive",
81 "endprogram",
82 "endproperty",
83 "endspecify",
84 "endsequence",
85 "endtable",
86 "endtask",
87 "enum",
88 "event",
89 "eventually",
90 "expect",
91 "export",
92 "extends",
93 "extern",
94 "final",
95 "first_match",
96 "for",
97 "force",
98 "foreach",
99 "forever",
100 "fork",
101 "forkjoin",
102 "function",
103 "generate|5",
104 "genvar",
105 "global",
106 "highz0",
107 "highz1",
108 "if",
109 "iff",
110 "ifnone",
111 "ignore_bins",
112 "illegal_bins",
113 "implements",
114 "implies",
115 "import",
116 "incdir",
117 "include",
118 "initial",
119 "inout",
120 "input",
121 "inside",
122 "instance",
123 "int",
124 "integer",
125 "interconnect",
126 "interface",
127 "intersect",
128 "join",
129 "join_any",
130 "join_none",
131 "large",
132 "let",
133 "liblist",
134 "library",
135 "local",
136 "localparam",
137 "logic",
138 "longint",
139 "macromodule",
140 "matches",
141 "medium",
142 "modport",
143 "module",
144 "nand",
145 "negedge",
146 "nettype",
147 "new",
148 "nexttime",
149 "nmos",
150 "nor",
151 "noshowcancelled",
152 "not",
153 "notif0",
154 "notif1",
155 "or",
156 "output",
157 "package",
158 "packed",
159 "parameter",
160 "pmos",
161 "posedge",
162 "primitive",
163 "priority",
164 "program",
165 "property",
166 "protected",
167 "pull0",
168 "pull1",
169 "pulldown",
170 "pullup",
171 "pulsestyle_ondetect",
172 "pulsestyle_onevent",
173 "pure",
174 "rand",
175 "randc",
176 "randcase",
177 "randsequence",
178 "rcmos",
179 "real",
180 "realtime",
181 "ref",
182 "reg",
183 "reject_on",
184 "release",
185 "repeat",
186 "restrict",
187 "return",
188 "rnmos",
189 "rpmos",
190 "rtran",
191 "rtranif0",
192 "rtranif1",
193 "s_always",
194 "s_eventually",
195 "s_nexttime",
196 "s_until",
197 "s_until_with",
198 "scalared",
199 "sequence",
200 "shortint",
201 "shortreal",
202 "showcancelled",
203 "signed",
204 "small",
205 "soft",
206 "solve",
207 "specify",
208 "specparam",
209 "static",
210 "string",
211 "strong",
212 "strong0",
213 "strong1",
214 "struct",
215 "super",
216 "supply0",
217 "supply1",
218 "sync_accept_on",
219 "sync_reject_on",
220 "table",
221 "tagged",
222 "task",
223 "this",
224 "throughout",
225 "time",
226 "timeprecision",
227 "timeunit",
228 "tran",
229 "tranif0",
230 "tranif1",
231 "tri",
232 "tri0",
233 "tri1",
234 "triand",
235 "trior",
236 "trireg",
237 "type",
238 "typedef",
239 "union",
240 "unique",
241 "unique0",
242 "unsigned",
243 "until",
244 "until_with",
245 "untyped",
246 "use",
247 "uwire",
248 "var",
249 "vectored",
250 "virtual",
251 "void",
252 "wait",
253 "wait_order",
254 "wand",
255 "weak",
256 "weak0",
257 "weak1",
258 "while",
259 "wildcard",
260 "wire",
261 "with",
262 "within",
263 "wor",
264 "xnor",
265 "xor"
266 ],
267 literal: [ 'null' ],
268 built_in: [
269 "$finish",
270 "$stop",
271 "$exit",
272 "$fatal",
273 "$error",
274 "$warning",
275 "$info",
276 "$realtime",
277 "$time",
278 "$printtimescale",
279 "$bitstoreal",
280 "$bitstoshortreal",
281 "$itor",
282 "$signed",
283 "$cast",
284 "$bits",
285 "$stime",
286 "$timeformat",
287 "$realtobits",
288 "$shortrealtobits",
289 "$rtoi",
290 "$unsigned",
291 "$asserton",
292 "$assertkill",
293 "$assertpasson",
294 "$assertfailon",
295 "$assertnonvacuouson",
296 "$assertoff",
297 "$assertcontrol",
298 "$assertpassoff",
299 "$assertfailoff",
300 "$assertvacuousoff",
301 "$isunbounded",
302 "$sampled",
303 "$fell",
304 "$changed",
305 "$past_gclk",
306 "$fell_gclk",
307 "$changed_gclk",
308 "$rising_gclk",
309 "$steady_gclk",
310 "$coverage_control",
311 "$coverage_get",
312 "$coverage_save",
313 "$set_coverage_db_name",
314 "$rose",
315 "$stable",
316 "$past",
317 "$rose_gclk",
318 "$stable_gclk",
319 "$future_gclk",
320 "$falling_gclk",
321 "$changing_gclk",
322 "$display",
323 "$coverage_get_max",
324 "$coverage_merge",
325 "$get_coverage",
326 "$load_coverage_db",
327 "$typename",
328 "$unpacked_dimensions",
329 "$left",
330 "$low",
331 "$increment",
332 "$clog2",
333 "$ln",
334 "$log10",
335 "$exp",
336 "$sqrt",
337 "$pow",
338 "$floor",
339 "$ceil",
340 "$sin",
341 "$cos",
342 "$tan",
343 "$countbits",
344 "$onehot",
345 "$isunknown",
346 "$fatal",
347 "$warning",
348 "$dimensions",
349 "$right",
350 "$high",
351 "$size",
352 "$asin",
353 "$acos",
354 "$atan",
355 "$atan2",
356 "$hypot",
357 "$sinh",
358 "$cosh",
359 "$tanh",
360 "$asinh",
361 "$acosh",
362 "$atanh",
363 "$countones",
364 "$onehot0",
365 "$error",
366 "$info",
367 "$random",
368 "$dist_chi_square",
369 "$dist_erlang",
370 "$dist_exponential",
371 "$dist_normal",
372 "$dist_poisson",
373 "$dist_t",
374 "$dist_uniform",
375 "$q_initialize",
376 "$q_remove",
377 "$q_exam",
378 "$async$and$array",
379 "$async$nand$array",
380 "$async$or$array",
381 "$async$nor$array",
382 "$sync$and$array",
383 "$sync$nand$array",
384 "$sync$or$array",
385 "$sync$nor$array",
386 "$q_add",
387 "$q_full",
388 "$psprintf",
389 "$async$and$plane",
390 "$async$nand$plane",
391 "$async$or$plane",
392 "$async$nor$plane",
393 "$sync$and$plane",
394 "$sync$nand$plane",
395 "$sync$or$plane",
396 "$sync$nor$plane",
397 "$system",
398 "$display",
399 "$displayb",
400 "$displayh",
401 "$displayo",
402 "$strobe",
403 "$strobeb",
404 "$strobeh",
405 "$strobeo",
406 "$write",
407 "$readmemb",
408 "$readmemh",
409 "$writememh",
410 "$value$plusargs",
411 "$dumpvars",
412 "$dumpon",
413 "$dumplimit",
414 "$dumpports",
415 "$dumpportson",
416 "$dumpportslimit",
417 "$writeb",
418 "$writeh",
419 "$writeo",
420 "$monitor",
421 "$monitorb",
422 "$monitorh",
423 "$monitoro",
424 "$writememb",
425 "$dumpfile",
426 "$dumpoff",
427 "$dumpall",
428 "$dumpflush",
429 "$dumpportsoff",
430 "$dumpportsall",
431 "$dumpportsflush",
432 "$fclose",
433 "$fdisplay",
434 "$fdisplayb",
435 "$fdisplayh",
436 "$fdisplayo",
437 "$fstrobe",
438 "$fstrobeb",
439 "$fstrobeh",
440 "$fstrobeo",
441 "$swrite",
442 "$swriteb",
443 "$swriteh",
444 "$swriteo",
445 "$fscanf",
446 "$fread",
447 "$fseek",
448 "$fflush",
449 "$feof",
450 "$fopen",
451 "$fwrite",
452 "$fwriteb",
453 "$fwriteh",
454 "$fwriteo",
455 "$fmonitor",
456 "$fmonitorb",
457 "$fmonitorh",
458 "$fmonitoro",
459 "$sformat",
460 "$sformatf",
461 "$fgetc",
462 "$ungetc",
463 "$fgets",
464 "$sscanf",
465 "$rewind",
466 "$ftell",
467 "$ferror"
468 ]
469 };
470 const BUILT_IN_CONSTANTS = [
471 "__FILE__",
472 "__LINE__"
473 ];
474 const DIRECTIVES = [
475 "begin_keywords",
476 "celldefine",
477 "default_nettype",
478 "default_decay_time",
479 "default_trireg_strength",
480 "define",
481 "delay_mode_distributed",
482 "delay_mode_path",
483 "delay_mode_unit",
484 "delay_mode_zero",
485 "else",
486 "elsif",
487 "end_keywords",
488 "endcelldefine",
489 "endif",
490 "ifdef",
491 "ifndef",
492 "include",
493 "line",
494 "nounconnected_drive",
495 "pragma",
496 "resetall",
497 "timescale",
498 "unconnected_drive",
499 "undef",
500 "undefineall"
501 ];
502
503 return {
504 name: 'Verilog',
505 aliases: [
506 'v',
507 'sv',
508 'svh'
509 ],
510 case_insensitive: false,
511 keywords: KEYWORDS,
512 contains: [
513 hljs.C_BLOCK_COMMENT_MODE,
514 hljs.C_LINE_COMMENT_MODE,
515 hljs.QUOTE_STRING_MODE,
516 {
517 scope: 'number',
518 contains: [ hljs.BACKSLASH_ESCAPE ],
519 variants: [
520 { begin: /\b((\d+'([bhodBHOD]))[0-9xzXZa-fA-F_]+)/ },
521 { begin: /\B(('([bhodBHOD]))[0-9xzXZa-fA-F_]+)/ },
522 { // decimal
523 begin: /\b[0-9][0-9_]*/,
524 relevance: 0
525 }
526 ]
527 },
528 /* parameters to instances */
529 {
530 scope: 'variable',
531 variants: [
532 { begin: '#\\((?!parameter).+\\)' },
533 {
534 begin: '\\.\\w+',
535 relevance: 0
536 }
537 ]
538 },
539 {
540 scope: 'variable.constant',
541 match: regex.concat(/`/, regex.either(...BUILT_IN_CONSTANTS)),
542 },
543 {
544 scope: 'meta',
545 begin: regex.concat(/`/, regex.either(...DIRECTIVES)),
546 end: /$|\/\/|\/\*/,
547 returnEnd: true,
548 keywords: DIRECTIVES
549 }
550 ]
551 };
552 }
553
554 return verilog;
555
556 })();
557 ;
558 export default hljsGrammar;