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1 /*! `verilog` grammar compiled for Highlight.js 11.11.1 */
2 (function(){
3 var hljsGrammar = (function () {
4 'use strict';
5
6 /*
7 Language: Verilog
8 Author: Jon Evans <jon@craftyjon.com>
9 Contributors: Boone Severson <boone.severson@gmail.com>
10 Description: Verilog is a hardware description language used in electronic design automation to describe digital and mixed-signal systems. This highlighter supports Verilog and SystemVerilog through IEEE 1800-2012.
11 Website: http://www.verilog.com
12 Category: hardware
13 */
14
15 function verilog(hljs) {
16 const regex = hljs.regex;
17 const KEYWORDS = {
18 $pattern: /\$?[\w]+(\$[\w]+)*/,
19 keyword: [
20 "accept_on",
21 "alias",
22 "always",
23 "always_comb",
24 "always_ff",
25 "always_latch",
26 "and",
27 "assert",
28 "assign",
29 "assume",
30 "automatic",
31 "before",
32 "begin",
33 "bind",
34 "bins",
35 "binsof",
36 "bit",
37 "break",
38 "buf|0",
39 "bufif0",
40 "bufif1",
41 "byte",
42 "case",
43 "casex",
44 "casez",
45 "cell",
46 "chandle",
47 "checker",
48 "class",
49 "clocking",
50 "cmos",
51 "config",
52 "const",
53 "constraint",
54 "context",
55 "continue",
56 "cover",
57 "covergroup",
58 "coverpoint",
59 "cross",
60 "deassign",
61 "default",
62 "defparam",
63 "design",
64 "disable",
65 "dist",
66 "do",
67 "edge",
68 "else",
69 "end",
70 "endcase",
71 "endchecker",
72 "endclass",
73 "endclocking",
74 "endconfig",
75 "endfunction",
76 "endgenerate",
77 "endgroup",
78 "endinterface",
79 "endmodule",
80 "endpackage",
81 "endprimitive",
82 "endprogram",
83 "endproperty",
84 "endspecify",
85 "endsequence",
86 "endtable",
87 "endtask",
88 "enum",
89 "event",
90 "eventually",
91 "expect",
92 "export",
93 "extends",
94 "extern",
95 "final",
96 "first_match",
97 "for",
98 "force",
99 "foreach",
100 "forever",
101 "fork",
102 "forkjoin",
103 "function",
104 "generate|5",
105 "genvar",
106 "global",
107 "highz0",
108 "highz1",
109 "if",
110 "iff",
111 "ifnone",
112 "ignore_bins",
113 "illegal_bins",
114 "implements",
115 "implies",
116 "import",
117 "incdir",
118 "include",
119 "initial",
120 "inout",
121 "input",
122 "inside",
123 "instance",
124 "int",
125 "integer",
126 "interconnect",
127 "interface",
128 "intersect",
129 "join",
130 "join_any",
131 "join_none",
132 "large",
133 "let",
134 "liblist",
135 "library",
136 "local",
137 "localparam",
138 "logic",
139 "longint",
140 "macromodule",
141 "matches",
142 "medium",
143 "modport",
144 "module",
145 "nand",
146 "negedge",
147 "nettype",
148 "new",
149 "nexttime",
150 "nmos",
151 "nor",
152 "noshowcancelled",
153 "not",
154 "notif0",
155 "notif1",
156 "or",
157 "output",
158 "package",
159 "packed",
160 "parameter",
161 "pmos",
162 "posedge",
163 "primitive",
164 "priority",
165 "program",
166 "property",
167 "protected",
168 "pull0",
169 "pull1",
170 "pulldown",
171 "pullup",
172 "pulsestyle_ondetect",
173 "pulsestyle_onevent",
174 "pure",
175 "rand",
176 "randc",
177 "randcase",
178 "randsequence",
179 "rcmos",
180 "real",
181 "realtime",
182 "ref",
183 "reg",
184 "reject_on",
185 "release",
186 "repeat",
187 "restrict",
188 "return",
189 "rnmos",
190 "rpmos",
191 "rtran",
192 "rtranif0",
193 "rtranif1",
194 "s_always",
195 "s_eventually",
196 "s_nexttime",
197 "s_until",
198 "s_until_with",
199 "scalared",
200 "sequence",
201 "shortint",
202 "shortreal",
203 "showcancelled",
204 "signed",
205 "small",
206 "soft",
207 "solve",
208 "specify",
209 "specparam",
210 "static",
211 "string",
212 "strong",
213 "strong0",
214 "strong1",
215 "struct",
216 "super",
217 "supply0",
218 "supply1",
219 "sync_accept_on",
220 "sync_reject_on",
221 "table",
222 "tagged",
223 "task",
224 "this",
225 "throughout",
226 "time",
227 "timeprecision",
228 "timeunit",
229 "tran",
230 "tranif0",
231 "tranif1",
232 "tri",
233 "tri0",
234 "tri1",
235 "triand",
236 "trior",
237 "trireg",
238 "type",
239 "typedef",
240 "union",
241 "unique",
242 "unique0",
243 "unsigned",
244 "until",
245 "until_with",
246 "untyped",
247 "use",
248 "uwire",
249 "var",
250 "vectored",
251 "virtual",
252 "void",
253 "wait",
254 "wait_order",
255 "wand",
256 "weak",
257 "weak0",
258 "weak1",
259 "while",
260 "wildcard",
261 "wire",
262 "with",
263 "within",
264 "wor",
265 "xnor",
266 "xor"
267 ],
268 literal: [ 'null' ],
269 built_in: [
270 "$finish",
271 "$stop",
272 "$exit",
273 "$fatal",
274 "$error",
275 "$warning",
276 "$info",
277 "$realtime",
278 "$time",
279 "$printtimescale",
280 "$bitstoreal",
281 "$bitstoshortreal",
282 "$itor",
283 "$signed",
284 "$cast",
285 "$bits",
286 "$stime",
287 "$timeformat",
288 "$realtobits",
289 "$shortrealtobits",
290 "$rtoi",
291 "$unsigned",
292 "$asserton",
293 "$assertkill",
294 "$assertpasson",
295 "$assertfailon",
296 "$assertnonvacuouson",
297 "$assertoff",
298 "$assertcontrol",
299 "$assertpassoff",
300 "$assertfailoff",
301 "$assertvacuousoff",
302 "$isunbounded",
303 "$sampled",
304 "$fell",
305 "$changed",
306 "$past_gclk",
307 "$fell_gclk",
308 "$changed_gclk",
309 "$rising_gclk",
310 "$steady_gclk",
311 "$coverage_control",
312 "$coverage_get",
313 "$coverage_save",
314 "$set_coverage_db_name",
315 "$rose",
316 "$stable",
317 "$past",
318 "$rose_gclk",
319 "$stable_gclk",
320 "$future_gclk",
321 "$falling_gclk",
322 "$changing_gclk",
323 "$display",
324 "$coverage_get_max",
325 "$coverage_merge",
326 "$get_coverage",
327 "$load_coverage_db",
328 "$typename",
329 "$unpacked_dimensions",
330 "$left",
331 "$low",
332 "$increment",
333 "$clog2",
334 "$ln",
335 "$log10",
336 "$exp",
337 "$sqrt",
338 "$pow",
339 "$floor",
340 "$ceil",
341 "$sin",
342 "$cos",
343 "$tan",
344 "$countbits",
345 "$onehot",
346 "$isunknown",
347 "$fatal",
348 "$warning",
349 "$dimensions",
350 "$right",
351 "$high",
352 "$size",
353 "$asin",
354 "$acos",
355 "$atan",
356 "$atan2",
357 "$hypot",
358 "$sinh",
359 "$cosh",
360 "$tanh",
361 "$asinh",
362 "$acosh",
363 "$atanh",
364 "$countones",
365 "$onehot0",
366 "$error",
367 "$info",
368 "$random",
369 "$dist_chi_square",
370 "$dist_erlang",
371 "$dist_exponential",
372 "$dist_normal",
373 "$dist_poisson",
374 "$dist_t",
375 "$dist_uniform",
376 "$q_initialize",
377 "$q_remove",
378 "$q_exam",
379 "$async$and$array",
380 "$async$nand$array",
381 "$async$or$array",
382 "$async$nor$array",
383 "$sync$and$array",
384 "$sync$nand$array",
385 "$sync$or$array",
386 "$sync$nor$array",
387 "$q_add",
388 "$q_full",
389 "$psprintf",
390 "$async$and$plane",
391 "$async$nand$plane",
392 "$async$or$plane",
393 "$async$nor$plane",
394 "$sync$and$plane",
395 "$sync$nand$plane",
396 "$sync$or$plane",
397 "$sync$nor$plane",
398 "$system",
399 "$display",
400 "$displayb",
401 "$displayh",
402 "$displayo",
403 "$strobe",
404 "$strobeb",
405 "$strobeh",
406 "$strobeo",
407 "$write",
408 "$readmemb",
409 "$readmemh",
410 "$writememh",
411 "$value$plusargs",
412 "$dumpvars",
413 "$dumpon",
414 "$dumplimit",
415 "$dumpports",
416 "$dumpportson",
417 "$dumpportslimit",
418 "$writeb",
419 "$writeh",
420 "$writeo",
421 "$monitor",
422 "$monitorb",
423 "$monitorh",
424 "$monitoro",
425 "$writememb",
426 "$dumpfile",
427 "$dumpoff",
428 "$dumpall",
429 "$dumpflush",
430 "$dumpportsoff",
431 "$dumpportsall",
432 "$dumpportsflush",
433 "$fclose",
434 "$fdisplay",
435 "$fdisplayb",
436 "$fdisplayh",
437 "$fdisplayo",
438 "$fstrobe",
439 "$fstrobeb",
440 "$fstrobeh",
441 "$fstrobeo",
442 "$swrite",
443 "$swriteb",
444 "$swriteh",
445 "$swriteo",
446 "$fscanf",
447 "$fread",
448 "$fseek",
449 "$fflush",
450 "$feof",
451 "$fopen",
452 "$fwrite",
453 "$fwriteb",
454 "$fwriteh",
455 "$fwriteo",
456 "$fmonitor",
457 "$fmonitorb",
458 "$fmonitorh",
459 "$fmonitoro",
460 "$sformat",
461 "$sformatf",
462 "$fgetc",
463 "$ungetc",
464 "$fgets",
465 "$sscanf",
466 "$rewind",
467 "$ftell",
468 "$ferror"
469 ]
470 };
471 const BUILT_IN_CONSTANTS = [
472 "__FILE__",
473 "__LINE__"
474 ];
475 const DIRECTIVES = [
476 "begin_keywords",
477 "celldefine",
478 "default_nettype",
479 "default_decay_time",
480 "default_trireg_strength",
481 "define",
482 "delay_mode_distributed",
483 "delay_mode_path",
484 "delay_mode_unit",
485 "delay_mode_zero",
486 "else",
487 "elsif",
488 "end_keywords",
489 "endcelldefine",
490 "endif",
491 "ifdef",
492 "ifndef",
493 "include",
494 "line",
495 "nounconnected_drive",
496 "pragma",
497 "resetall",
498 "timescale",
499 "unconnected_drive",
500 "undef",
501 "undefineall"
502 ];
503
504 return {
505 name: 'Verilog',
506 aliases: [
507 'v',
508 'sv',
509 'svh'
510 ],
511 case_insensitive: false,
512 keywords: KEYWORDS,
513 contains: [
514 hljs.C_BLOCK_COMMENT_MODE,
515 hljs.C_LINE_COMMENT_MODE,
516 hljs.QUOTE_STRING_MODE,
517 {
518 scope: 'number',
519 contains: [ hljs.BACKSLASH_ESCAPE ],
520 variants: [
521 { begin: /\b((\d+'([bhodBHOD]))[0-9xzXZa-fA-F_]+)/ },
522 { begin: /\B(('([bhodBHOD]))[0-9xzXZa-fA-F_]+)/ },
523 { // decimal
524 begin: /\b[0-9][0-9_]*/,
525 relevance: 0
526 }
527 ]
528 },
529 /* parameters to instances */
530 {
531 scope: 'variable',
532 variants: [
533 { begin: '#\\((?!parameter).+\\)' },
534 {
535 begin: '\\.\\w+',
536 relevance: 0
537 }
538 ]
539 },
540 {
541 scope: 'variable.constant',
542 match: regex.concat(/`/, regex.either(...BUILT_IN_CONSTANTS)),
543 },
544 {
545 scope: 'meta',
546 begin: regex.concat(/`/, regex.either(...DIRECTIVES)),
547 end: /$|\/\/|\/\*/,
548 returnEnd: true,
549 keywords: DIRECTIVES
550 }
551 ]
552 };
553 }
554
555 return verilog;
556
557 })();
558
559 hljs.registerLanguage('verilog', hljsGrammar);
560 })();